Frequency synthesizers having phase lock loops (PLL) are widely utilized in electronic systems. Particularly, in communication systems frequency synthesizers provide an advantage in reducing the circuitry required to transmit and receive signals on different frequencies. Such digital phase lock loops are well known in the art. Digital PLLs may be used for generating a number of frequencies from a reference frequency, by simply changing a dividing factor.
A significant parameter when considering a synthesizer system is its lock time. The lock time is the amount of time elapsed before the PLL is locked from one frequency to another frequency. A PLL having wider loop bandwidth generally provides faster lock time. The frequency resolution of the PLL is another important parameter to consider, and is determined by the reference frequency having an integer divider. For example a 5 KHz reference frequency provides a 5 KHz frequency resolution per divider step. One method to widen the loop bandwidth of the phase lock loop is to increase the reference frequency. However, increasing the reference frequency produces a more coarse resolution for the PLL. In order to achieve finer resolution, fractional dividers are used in the feed back of the loop. The fractional dividers, however, produce low frequency spurs, when dividing the output of a voltage controlled oscillator (VCO). These low frequency spurs may be reduced in the fractional divider itself. However, In order to mitigate the regeneration of these low frequency spurs, phase detector having a linear transfer characteristic is necessary. Additionally, in some applications where fractional dividers are used, the narrow lock range of the VCO and the frequency range within which the PLL must operate makes frequency steering a necessity.
A digital phase detector comprises an integral part of a digital phase lock loop system. The digital phase detector provides an output, which is characterized by the phase difference between a first reference frequency signal and a second divided VCO signal. Dual state phase detectors and tri-state phase detectors are widely used in digital PLLs.
A tri-state phase detector provides an output that has three conditions corresponding to a positive phase difference, a negative phase difference and a zero phase difference between the first and second input signals. Therefore, the tri-state phase detector provides frequency steering. However, a tri-state phase detector does not provide the necessary linearity in the phase difference detecting range.
A dual state phase detector provides an output having a duty cycle which is characterized by the phase difference between the first and second input signals. When the first and the second input signals are equal in frequency and 180 degrees out of phase, a 50% duty cycle at the output is provided. In practice the duty cycle of the output of the phase detector can be converted to a physical parameter such as current. Generally, a dual state phase detector acts linearly within a phase difference detecting range of 360 degrees. This can be illustrated by referring to the graph 100' shown in FIG. 1. The horizontal axis in the graph 100' represents the phase difference between the first and the second input signals, and the vertical axis represents the output of the phase detector expressed as current. A phase difference of 0 degrees may be represented by a finite current of-1, and a phase difference of 360 degrees may be represented by a finite current of +1. Accordingly, a phase difference of 180 degrees provides a zero current. As can be seen the output of the phase detector acts linearly from 0 degrees to 360 degrees, and crosses the zero point at 180 degrees. A major disadvantage of a dual state phase detector is its inability to steer the frequency in the correct direction. This is shown by considering the phase difference moving from point A to point B, when the phase difference exceeds 360 degrees. Under this condition the phase detector output acts non-linearly, and reverses the sign of the output, thereby steering the frequency in the opposite direction. Accordingly, since the phase detector skips detection of a full cycle on one of the input signals, a "cycle skip" occurs.
Therefor, it is desired to provide a linear phase detector having frequency steering capability.